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CDI 2017 Graduate Engineer, Graduates, Hardware Engineering

chez Arm à Sophia-Antipolis en categorie electronique-hardware

Introduction We are looking for enthusiastic graduate engineers interested in a career in digital design, verification, modelling and implementation. At ARM, you will be shaping the future of technology and collaborating in the development of next-generation CPU that fuel billions of devices world-wide.ARM’s Sophia Antipolis design centre is located in one of the most beautiful parts of France, at the heart of Europe’s largest and most dynamic technology park. Surrounded by mountains and the Mediterranean Sea, this exceptional design centre has delivered leading products from ARM’s Cortex (TM) processor family. Design, Verification, Modelling & Implementation Graduates Roles at ARM: There are graduate design, verification, modelling and implementation roles within the Sophia Antipolis CPU team, which is focused on mainstream processors ranging from high-end cores to micro-controllers.These components are used extensively in consumer devices such as mobile phones and tablets as well as in numerous other electronic products from sensors to servers.Working in the CPU Group, you will need to be creative, innovative and enthusiastic about new technologies. Our engineers create products providing world class performance and low power.Graduate engineers immediately start working on real project tasks with help and guidance of experienced engineers. Through teamwork, training and dedication to personal development, our goal is that every graduate engineer quickly learns about different aspects of developing highly-complex designs, starts contributing to different project tasks and ultimately develops into an expert in the field.You will be working in a multi-site and multi-cultural environment.What will your role be? • You will be creating the specifications for the next generation of ARM’s CPU products, analysing the trade-offs between different options via modelling or RTL. • You will be developing the IP in RTL, working with the rest of the design team to deliver a product with leading power efficiency and performance. • You will be verifying that IP to the highest quality standards using a wide range of methodologies – constrained random simulation using testbenches written using various languages, running real applications on emulation or FPGA platforms, and formal methods. • You will be conducting implementation trials of the IP using leading edge tools and technology nodes and developing the complete implementation flow from synthesis to GDSII, including static timing analysis, IR drop analysis and equivalence checking.
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Date de l'annonce 08-09-2016
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