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CDI Staff Verification Digital Design Engineer, Experienced Professionals, Hardware Engineering

chez Arm à Sophia-Antipolis en categorie electronique-hardware

Arm Physical Design Group (PDG) delivers the most comprehensive and advanced physical IP solution allowing the implementation of complex SoC designs. What Arm PDG offers is the oldest and most widely used in the industry and includes logic IP, Standard Cell, Embedded Memory Compilers, Interface IP and Processor Optimization Pack (POPs). All of the Arm physical IP products are specifically optimized for each foundry and process technology from 250nm to 7-5nm semiconductor processes for various foundries and IDMs.The Silicon Validation group engages in the validation of the library products offered by Arm PDG on Silicon. We design on test chips aimed to validate IP products (logic libraries, memories, IOs, Analog blocks, System IPs) for cutting-edge semiconductor processes (viz. >90nm, 90nm, 65nm, 40nm, 32nm, 28nm and 14nm) for various leading foundries and IDMs around the world. We then characterize and test the silicon dies created by the foundries. These IPs are used by SOC companies & integrated in their design. It is imperative to validate them, to confirm their functionality to customers.Job Purpose:You will work as part of the PDG Silicon Validation team, being responsible of digital pre-silicon design verification, from IP level to SoC level.Your area of work will cover verification, integration of IPs and development/improvement of flow/methodology for verification.You will be using a broad array of skills necessary to validate digital IPs at RTL and gate level, but also to fix and/or develop RTL design. You are able to run synthesis and have basics to setup constraints. You are familiar with DFT concepts and capable to run ATPG.We push every team member to propose, discuss with the rest of the team all changes that improves the efficiency.To be a successful contributor PDG SV Team you are persistent, pragmatic, globally aware, ethically strong, believe in making profit and be prepared to work hard to get the job done time after time. Delivery of results is an important measurement of success in this role.What will you be accountable for:Understanding IPs specification, you will targetDefining and documenting the verification environment you will use to find bugs in the IPs you will test; plus specifying the verification sign-off criteria;Building the testbench by using appropriate methodology and programming language(s);Running tests to validate all features and stress the design in corner cases to find all possible bugs.Improving the Quality of Results of the verification flowPropose to the technical lead area of improvement that you will have identifiedParticipate to design tasks.
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Date de l'annonce 20-11-2018
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