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CDI 2019 Hardware/software internship - 5-6 months, Interns/Students, Hardware Engineering

chez Arm à Sophia-Antipolis en categorie electronique-hardware

Are you creative, innovative, and enthusiastic about new technologies? Do you enjoy programming and have a knack for problem solving?At Arm you will shape the future of technology and collaborate in the development of next-generation CPUs to power billions of devices worldwide.Internship offers at Arm Sophia AntipolisWe have exciting opportunities in the CPU hardware groups. We develop mainstream processors ranging from high-performance cores to low-power secure micro-controllers.At Arm we empower our talented individuals to work together as a team to push the boundaries of what is possible!As an intern you will directly influence the development of hardware IP that is used extensively in a wide variety of devices, from mobile phones and tablets to sensors to servers.You will be able to work closely with our talented and expert engineers to help design groundbreaking technology. You will gain knowledge and tackle challenges while being able to encounter opportunities to work on all aspects of product development.You will work on real projects from day one, with help and guidance from expert engineers. Through teamwork, and dedication to personal development, we ensure that every intern learns about different aspects of our work, and becomes knowledgeable in the field.What will your role be?Depending on the subject:You will help analysing trade-offs between different options via modelling in C or C++ or a hardware description language (HDL).You will develop IP in HDL, working with the rest of the design team to deliver a product with leading power efficiency and performance.You will verify IP to the highest quality standards using a wide range of methodologies like constrained random simulation using test benches written in SystemVerilog, running real applications on emulation or FPGA platforms, and using formal methods.Several subjects are available and described below. Choose the one(s) you prefer and indicate them in your application. Only one student will work on a given subject, followed by a dedicated experienced engineer.Subjects details[2019-V-1] Create an automated infrastructure to detect performance issues Performance bugs are major threats for the next generation CPUs and must be detected efficiently. The goal of this internship is to create an automated infrastructure designed to find performance issues. Using the latest CPU design, you will understand the critical features which yield performance, create benchmarks to stress them, and turn this into a performance verification flow. [2019-V-2] Check data hazard using formal methods Data hazard is one of the key element to guarantee the correctness of performance optimisations in modern application CPUs. The goal of this internship is to use formal verification technics to verify potential memory ordering issues caused by data hazard in a memory system. You will use a formal verification environment to build a solution and run it, using a real and recent CPU design as test case. [2019-V-3] Implement an FPGA hardware accelerator to speed-up verification When developing a new CPU, lots of computation time is used in FPGA farms to check its correct behaviour. The goal of this internship is to study how to implement a hardware accelerator to speed up this part. You will study and compare different algorithms, implement one as an IP in the FPGA environment, and check its benefits. [2019-V-4] Find and fix security flaws using formal methods Modern CPUs use speculation more and more aggressively in order to reach outstanding performances. However this can lead to devastating security exploits that use speculation to reveal critical data, as Google Project Zero has shown. You will reproduce security flaws on real CPUs using formal verification and verify counter-measures. [2019-V-5] Generate hardware assertion checkers for CPU verification on FPGA The SystemVerilog assertion's main role is in verification through simulation, emulation and formal verification. To allow assertions to be used also in FPGA, a generator is required to transform the non-synthesisable assertions into circuit-level checkers. You will help generate resource-efficient assertion-checking circuits in order to use assertion-based verification on FPGA. [2019-V-6] Create GUI to analyse CPU execution data During RTL simulation of a CPU core, micro-architectural events are logged as a sequence of C-like structures. They are later processed to create various abstraction levels, from micro-architectural event streams to instruction sequences. It is challenging to use all these abstraction levels together to examine regions of interest, to have a general view of the execution or to understand a bug. You will:  - Understand the needs for abstraction levels navigation in the current CPU project.  - Define an ergonomic solution (GUI in Python or C++) to present data and enable navigation to users.  - Extract the generic parts of the solution into a GUI framework, usable by other CPU projects at Arm. [2019-V-7] Find patterns in load/store address sequence from source code We want to generate better tests on our memory testbench . To do so, you will write a program to recognize patterns in address sequences and correlate them with other information (for instance whether they found any bug), ultimately to generate MMU mappings for brand new tests. This will be integrated in an existing environment to improve CPU verification. [2019-V-8] Develop a cross-compilation framework to compile, link and execute code on any ARM processor. The internship will start with an analysis and research phase about existing ARM core to study what are the possible type of code which can be executed  on an ARM core. Then the candidate will look into Linaro and ARM Compiler tool chains to find the best flow to compile a generic source (C or Assembly) for heterogeneous targets. Finally, the target binary images will be verified using an RTL simulation environment.Introduction We are looking for enthusiastic interns interested in a career in digital design. At Arm, you will be shaping the future of technology and collaborating in the development of next-generation CPU that fuel billions of devices world-wide.Arm, multinational company that kept its start-up’s soul, leading provider of low-power, high performance processor IP, heavily invests in its French sites.Arm’s Sophia Antipolis design centre is located on the French Riviera, at the heart of Europe’s largest and most dynamic technology park. This exceptional design centre has delivered leading products from Arm’s CortexTM processor family, such as Cortex-A9, and recently Cortex-M23 and Cortex-A75.Join our success!  We look forward to receiving your application! Benefits and packageSalary - €1500 per monthfree car parkingluncheon vouchers & Public Transport Pass reductionteam and social events 
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Date de l'annonce 13-11-2018
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